An innovation for prevention latchup,pseudo-latchup path method,has been put forward that is based on latchup effects of bulk-Si CMOS devices.
从体硅CMOS器件
闭
效应入手,提出了抑制闭一种新方法—伪闭路
法。
An innovation for prevention latchup,pseudo-latchup path method,has been put forward that is based on latchup effects of bulk-Si CMOS devices.
从体硅CMOS器件闭效应入手,提出了抑制闭一种新方法—伪闭路法。
95 Abstract With the rapid development of the IC manufacture, the critical dimension(CD) of the manufacturable CMOS technology has been put into 90nm, even 65nm and below from 130nm.
摘 要 随着IC制造技
快速发展，可量产CMOS技，
征线宽也由0.13um 进入了90nm甚至65nm及以下。
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表达内容亦不代表本软件
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